Details

Minutes
  • chw
Attendees
  • chw
  • ntd
  • Florian
  • Hannes
  • Mathis
  • Alex
  • Marc
  • Martin
Agenda
  • Welcome
  • Current status of the “Seminare”, the theses, and the work of student assistants
  • Determine next meeting

Discussion

  • Hannes:
    • Architectures with loops are now possible
    • Implemented with an additional PRE signal
  • Florian:
    • Waits for Sören’s refactoring of the trace processing stages
  • Mathis:
    • DSL for stages works now
    • Supports multiple input/output ports, producer/consumer, on starting/terminating
    • Sketches his DSL on the whiteboard
  • Alex:
    • Transformation from Kieker-Logs to SDG works
    • Aggregated runtime information is added to the CALL relationships
  • Marc:
    • Dynamic thread assignments works now
    • Next step: unit and performance tests
  • Martin:
    • Pipeline DSL works
    • Short syntax for pipeline currently works with hard-coded ports “inputPort” and “outputPort”
    • Future work: pipeline syntax should base on the number of ports

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